The present invention relates to a reference voltage generating circuit, and more specifically, to a reference voltage generating circuit for outputting a voltage equal to a band gap voltage multiplied by an integer by utilizing a forward direction voltage of a diode junction biased along a forward direction.
Normally, a power supply circuit element such as a 3-terminal regulator is used as a band gap reference voltage generating circuit. The band gap reference voltage generating circuit is a circuit which outputs a voltage equal to a band gap voltage X, an integer, by using a forward direction voltage of a diode junction biased along a forward direction in order to satisfy a very strict temperature compensation characteristic.
FIG. 8 is a circuit diagram for showing a conventional band gap reference voltage generating circuit. The circuit comprises a normal phase input voltage generating unit 11 for outputting a normal phase input voltage (VIN+), and a reverse phase input voltage generating unit 12 for outputting a reverse phase input voltage (VIN-). Also, the circuit comprises a voltage output unit 13 constructed of an operational amplifier OP11 for outputting a reference output voltage VOUT based on the normal phase input voltage VIN+ and the reverse phase input voltage VIN-, which are applied to a normal phase input terminal and a reverse phase input terminal, respectively. The circuit includes a resistor R10 for continuously supplying a power supply voltage VDD to the normal phase input voltage generating unit 11 and the reverse phase input voltage generating unit 12.
The normal phase input voltage generating unit 11 comprises a resistor R11 and diodes D11 and D12 connected in series in the forward direction from the reference output voltage VOUT in this order between the reference output voltage VOUT and the ground potential GND. The normal phase input voltage VIN+ is outputted from a connection node between the resistor R11 and an anode of the diode D11.
The reverse phase input voltage generating unit 12 comprises resistors R12 and R13 and diodes D13 and D14 connected in series from the reference output voltage VOUT in this order between the reference output voltage VOUT and the ground potential GND in parallel to the normal input voltage generating unit 11. The reverse phase input voltage VIN- is output from a connection point between the resistor R12 and the resistor R13.
These normal phase input voltage VIN+ and reverse phase input voltage VIN- are inputted to the normal phase input terminal and the reverse phase input terminal of the operational amplifier OP11, respectively. The reference voltage generating circuit can cancel the influence of the temperature coefficient of the diodes by selecting the resistors through R13. Therefore, the operational amplifier OP11 outputs the reference output voltage VOUT obtained by multiplying the band gap voltage whose temperature coefficient is substantially equal to zero by an integer (in this case, since two sets of diodes are employed, two times).
However, in such a conventional reference voltage generating circuit, when the power supply voltage VDD is raised, the power supply voltage VDD is merely applied through the resistor R10 to the normal phase input voltage generating unit 11 and the reverse phase input voltage generating unit 12. As a result, in the case where the power supply voltage VDD is gently raised, there is a problem that the reference output voltage VOUT becomes unstable during a time period until the power supply voltage VDD is reached to a preselected value.
FIG. 9 is a waveform chart for indicating the operations of the conventional reference voltage generating circuit. A solid line shows a desirable reference output voltage, and a broken line indicates the conventional reference output voltage VOUT.
Generally speaking, operational amplifiers and resistors, and the like, each have their own manufacturing fluctuations (differences) in their electric characteristics. In particular, in the conventional reference voltage generating circuit (see FIG. 8), when either the fluctuation in the input offset voltage of the operational amplifier OP11 or the fluctuations in the resistance values of the resistors R11 to R13 cause the voltage VIN- to be higher than the voltage VIN+, the following problem occurs. When the power supply voltage VDD is gradually raised, during the time period until the power supply voltage VDD has reached a predetermined value, the reference output voltage VOUT is increased with the power supply voltage VDD, so that the desirable stable characteristic (solid line) could not be obtained, but, as indicated in the broken line, the generation of the reference output voltage is delayed from the power supply voltage, resulting in an unstable state. Therefore, because the voltage VIN- is higher than the voltage VIN+, the amplifier OP11 outputs the voltage GND as the voltage VOUT.
On the other hand, a reference voltage generating circuit is disclosed in Japanese laid-Open patent Application No. 3-242715. FIG. 10 shows a circuit diagram for showing a reference voltage generating circuit disclosed in the Application No. 3-242715.
The reference voltage generating circuit has deleted the resistance R10 and added a P-channel transistor 18 and a level detecting circuit 17, compared to the circuit shown in FIG. 8. The transistor 18 is coupled between the power supply voltage VDD and the resistance R11. The level detecting circuit 17 has an input terminal connected to a connecting node of the transistor 18 and the resistance R11 and an output terminal connected to a gate of the transistor 18. Operations of this reference voltage generating circuit will now be explained.
At start up, the output voltage VOUT is almost Ov. At that time, the voltage detecting circuit 17 detects the level of the output voltage VOUT (Ov) and activates the transistor 18. Consequently, the output voltage VOUT is raised. When the output voltage VOUT is raised over a predetermined voltage, the detecting circuit 17 detects the voltage level and deactivates the transistor 18.
However, the reference voltage generating circuit disclosed by Japanese Application No. 3-242715 also has the same problem as the circuit shown in FIG. 8. That is, the circuit shown in FIG. 10 has a problem in a case that either the fluctuation in the input offset voltage of the operational amplifier OP11 or the fluctuations in the resistance values of the resistors R11 to R13 cause the voltage VIN- to be higher than the voltage VIN+.